About Me

I am a fifth (final) year Ph.D. student in Computer Science and Technology at the Institute for Interdisciplinary Information Sciences (IIIS), Tsinghua University (THU). I am advised by associate Prof. Kaisheng Ma and also work closely with Prof. Dong Xiang and Prof. Torsten Hoefler. I received my bachelor’s degree in Information Engineering with Zhiyuan honor degree and second bachelor’s degree in Mathematics and Applied Mathematics at Shanghai Jiaotong University (SJTU).

I am looking for job opportunities

Research Interests

Computer Architecture: chiplet, advanced packaging/integration, chip-to-chip interface
Interconnection Network: on-chip network, HPC network, datacenter network, optical network
High-performance Computing: LLM training and inference

News

[Dec. 2024] I am awarded the ByteDance Scholarship.
[Nov. 2024] I am awarded the National Scholarship (2 of all CS PhD students in IIIS).
[Jul. 2024] Our paper “Ring Road: A Scalable Polar-Coordinate-based 2D Network-on-Chip Architecture” has been accepted in the MICRO 2024.
[Jul. 2024] I start my six-month academic visit at SPCL, ETH Zurich, under the supervision of Prof. Torsten Hoefler.
[Jun. 2024] Our paper “Switch-Less Dragonfly on Wafers: A Scalable Interconnection Architecture based on Wafer-Scale Integration” has been accepted in the SC 2024.
[May. 2024] Our paper “Evaluating Chiplet-based Large-Scale Interconnection Networks via Cycle-Accurate Packet-Parallel Simulation” has been accepted in the ATC 2024.

Publications

Yinxiao Feng*, Wei Li* (*Co-First), and Kaisheng Ma. Ring Road: A Scalable Polar-Coordinate-based 2D Network-on-Chip Architecture. 57th IEEE/ACM International Symposium on Microarchitecture (MICRO), 2024.

Paper CCF-A, 22.7% (113/497)
Yinxiao Feng and Kaisheng Ma. Switch-Less Dragonfly on Wafers: A Scalable Interconnection Architecture based on Wafer-Scale Integration. International Conference for High Performance Computing, Networking, Storage, and Analysi (SC), 2024.

Paper Code CCF-A, 21.1% (99/470)
Yinxiao Feng, Yuchen Wei, Dong Xiang, and Kaisheng Ma. Evaluating Chiplet-based Large-Scale Interconnection Networks via Cycle-Accurate Packet-Parallel Simulation. USENIX Annual Technical Conference (ATC), 2024.

Paper Code CCF-A, 15.8% (77/488)
Yinxiao Feng, Dong Xiang, and Kaisheng Ma. Heterogeneous Die-to-Die Interfaces: Enabling More Flexible Chiplet Interconnection Systems. 56th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2023.

Paper CCF-A, 23.8% (101/424)
Yinxiao Feng, Dong Xiang, and Kaisheng Ma. A Scalable Methodology for Designing Efficient Interconnection Network of Chiplets. IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2023.

Paper CCF-A, 25% (91/364)
Yinxiao Feng and Kaisheng Ma. Chiplet Actuary: A Quantitative Cost Model and Multi-Chiplet Architecture Exploration. 59th ACM/IEEE Design Automation Conference (DAC), 2022.

Paper Code CCF-A, 23%
Qichao Ma, Yinxiao Feng, and Kaisheng Ma. A Low-Power Ultra-Compact Ultrasonic Communication System for Neural Spike Events Recording. IEEE International Ultrasonics Symposium (IUS), 2021.

Paper
Zhenhua Wu, Yinxiao Feng, Yan Liu, Huilie Shi, Shuai Zhang, Zekun Liu, and Zhiyu Hu. Bipolar Resistive Switching in the Ag/Sb2Te3/Pt Heterojunction. ACS Applied Electronic Materials, 2021.

Paper

Awards

2024: ByteDance Scholarship
2024: National Scholarship (Graduate, PhD)
2023: Integrated Circuit High-Level Urgently-Needed Talents (China Education Development Foundation)
2020: Outstanding Graduate of Shanghai
2019: National Scholarship (Undergraduate)
2015: First Prize in Chinese Physics Olympiad in Senior